connectproconsultants.com Hiring for Physical Design, STA, & Synthesis

 We are hiring for product companies Chennai.

Skills:Physical Design,STA,Synthesis. Experience: 2 to 20 years. Interested candidate kindly send me your resume to vikas@connectproconsultants.com Regards Vikas vikas@connectproconsultants.com /7259699404

Comments

Post a Comment

Popular posts from this blog

Mirafra - Senior Verification Engineers for Bengaluru, Hyderabad, Chennai & Noida Location

 1. Interested kindly share their resumes to  anushakonda@mirafra.com *Receiving Resumes has a limit. Kindly apply ASAP. 2. Mirafra Technologies hiring for below positions  1.  #ASIC_RTL  Design Engineer :: 2+ years 2.  #Physical_Design : 3+ years 3.  #PV : 3+ years 4.  #STA_Engineers : 2+ years 5.  #DFT_Engineers : 3+ years 6.  #Synthesis_Engineers : 2+ years 7.  #IR_Drop : 4+ years 8. #PD_CAD : 3+ years Interested can share CV to  sapnaranee@mirafra.com
Read more

Intel is Hiring Pre Silicon Verification Engineer

an experienced Pre Silicon Verification Engineer. Please find the desired qualification below. Kindly DM me if you are looking forward to an exciting job role with Intel Basic Qualifications: 8-15yrs of relevant experience Hands-on RTL debug expertise using VCS/Verdi toolchain Experience with OVM/UVM testbench methodology and writing of tests Good scripting skills to analyze IP logs and transaction-level debugging Preferred Qualifications: Experienced in PCIe link training and protocols Knowledge of CXL and cache coherency protocols Excellent communication skills and working in a team environment for integration and debug https://www.linkedin.com/in/avinash-k-v-5a0309100/
Read more

TESSOLVE Is Hiring CDC/Lint

  TESSOLVE Is Hiring CDC/Lint Exp: 4-8 years; Qualification BE / ME / B.Tech / M.Tech in EEE/ECE/EI/CS Experience 4 to 8 years No of Position 4 Location Bangalore Requirements Synthesis Constraints development, LINT checks, CDC checks. Working / leading full-chip STA closure, defining mode requirements & corners for timing closure. Formal Verification-Synopsys Formality/ Cadence. CTS & ECO cycle. JOB FUNCTION: IT Hardware : Hardware Products & Services INDUSTRY: Telecom, IT-Hardware/Networking SPECIALIZATION: Hardware Design QUALIFICATION: BE/ B.Tech (Engineering) EMPLOYMENT TYPE: Full Time
Read more